ZynqMP: PL PCIe leads to compile error of PMU and FSBL using Xilinx 2025.2

[leszekpolak]

Custom PCIe in PL used in ZynqMP leads to compile error of PMU and FBBL code if Xilinx 2025.2 is used.

There seems to be wrong condition check of QDMA_PCIE_BRIDGE that generally is only available for Versal SoCs.

Have created following patch that works fine for me, tested on XCZU7EV device:

XilinxProcessorIPLib/drivers/xdmapcie/src/xdmapcie.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/XilinxProcessorIPLib/drivers/xdmapcie/src/xdmapcie.c b/XilinxProcessorIPLib/drivers/xdmapcie/src/xdmapcie.c
index 0ca6db7b20..2b94dd7f5e 100644
--- a/XilinxProcessorIPLib/drivers/xdmapcie/src/xdmapcie.c
+++ b/XilinxProcessorIPLib/drivers/xdmapcie/src/xdmapcie.c
@@ -1473,7 +1473,7 @@ void XDmaPcie_GetLocalBusBar2PcieBar(XDmaPcie *InstancePtr, u8 BarNumber,
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(BarAddrPtr != NULL);
Xil_AssertVoid(BarNumber < InstancePtr->Config.LocalBarsNum);
-#if !defined(versal) || defined(QDMA_PCIE_BRIDGE)
+#if defined(versal) || defined(QDMA_PCIE_BRIDGE)
Xil_AssertVoid(InstancePtr->Config.IncludeBarOffsetReg != FALSE);
#endif

@@ -1510,7 +1510,7 @@ void XDmaPcie_SetLocalBusBar2PcieBar(XDmaPcie *InstancePtr, u8 BarNumber,
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(BarAddrPtr != NULL);
Xil_AssertVoid(BarNumber < InstancePtr->Config.LocalBarsNum);
-#if !defined(versal) || defined(QDMA_PCIE_BRIDGE)
+#if defined(versal) || defined(QDMA_PCIE_BRIDGE)
Xil_AssertVoid(InstancePtr->Config.IncludeBarOffsetReg != FALSE);
#endif

[Coding-xinxiangwanji2017]

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