I’m a Computer Engineering student at Iowa State University with a minor in Cyber Security Engineering. I'm passionate about software development, embedded systems, hardware design, and cybersecurity.
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Embedded µGPU ASIC Design Iowa State Universtiy Senior Design project. Designing an open source embedded graphics card in verilog using OpenLane toolflow, the design will be taped out in May 2026.
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Hardware Hacking Creating as many useful reverse engineering tools for every electronic I can get my hands on and take apart. From old IP cameras to my car's CAN bus.
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CAN Bus Spedometer Working on reverse engineering my car's can bus to create a custom digital spedometer and other custom gauges.
Languages: C / C++ | Python | Bash | Verilog / VHDL | Java
Tools: Ghidra | SavvyCAN | Wireshark | Metasploit | nmap
Environments: Arch Linux | Kali | VirtualBox | PlatformIO | mBed
- Email: jarceo@iastate.edu